Unit 11.1A · Term 1

System Bus

The system bus is the highway that connects the CPU, memory, and I/O devices. It carries data, addresses, and control signals — the three things needed for every operation inside a computer.

Learning Objectives

11.3.2.2 Describe the purpose of CPU components, system bus and main memory

Lesson Presentation

11.1A-system-bus.pdf · Slides for classroom use

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Conceptual Anchor

The Highway System Analogy

The system bus is like a 3-lane highway. The address lane tells traffic where to go. The data lane carries the cargo. The control lane has traffic signals (read/write/interrupt). All components are connected by this highway.

Rules & Theory

The Three Buses

Bus	Carries	Direction	Width
Address Bus	Memory addresses	One-way (CPU → Memory)	Determines max addressable memory (e.g. 32-bit = 4GB)
Data Bus	Data & instructions	Two-way (bidirectional)	Determines how much data per transfer (e.g. 64-bit)
Control Bus	Control signals	Two-way (bidirectional)	Read, Write, Interrupt, Clock

System Bus Diagram

    CPU                Memory              I/O Devices
   ┌────┐             ┌────────┐           ┌────────┐
   │    │─────────────│        │───────────│        │
   │    │ Address Bus │        │           │        │
   │    │─────────────│        │───────────│        │
   │    │  (one-way →)│        │           │        │
   │    │─────────────│        │───────────│        │
   │    │ Data Bus    │        │           │        │
   │    │─────────────│        │───────────│        │
   │    │  (two-way ↔)│        │           │        │
   │    │─────────────│        │───────────│        │
   │    │ Control Bus │        │           │        │
   │    │─────────────│        │───────────│        │
   │    │  (two-way ↔)│        │           │        │
   └────┘             └────────┘           └────────┘

Control Bus Signals

Signal	Purpose
Read	Tells memory to output data at the specified address
Write	Tells memory to store data at the specified address
Clock	Synchronises all operations to a regular pulse
Interrupt	Peripheral signals the CPU that it needs attention
Bus Request	Device requests access to the bus
Bus Grant	CPU grants bus access to the device

Bus Width & Performance

Bus Width	Effect
Wider Address Bus	More memory addresses → more RAM can be used (32-bit = 4GB max, 64-bit = 16 exabytes)
Wider Data Bus	More data per transfer → faster processing

How a Memory Read Works

1) CPU places address on address bus → 2) CU sends READ on control bus → 3) Memory sends data back on data bus → 4) Data arrives in MDR register.

Common Pitfalls

Address Bus is Bidirectional

The address bus is one-way only (CPU → Memory). The CPU sends addresses; memory never sends addresses back. Only the data bus and control bus are bidirectional.

Tasks

Remember

Name the 3 buses and state what each carries.

Understand

Explain why the address bus is unidirectional but the data bus is bidirectional.

Apply

A computer has a 32-bit address bus. Calculate the maximum amount of addressable memory.

Analyze

Explain how increasing the data bus width from 32-bit to 64-bit improves performance.

Self-Check Quiz

Q1: What does the address bus carry?

Memory addresses — it tells the system WHERE to read/write data.

Q2: Which bus is unidirectional?

The address bus (CPU → Memory only).

Q3: What control signal tells memory to output data?

The READ signal, sent via the control bus.